Development of a Low-Power Edge AI Accelerator for Real-Time Computer Vision in Embedded Systems
Table Of Contents
Chapter ONE
INTRODUCTION
- 1.1Introduction
- 1.2Background of Study
- 1.3Problem Statement
- 1.4Objectives of the Study
- 1.5Limitations of the Study
- 1.6Scope of the Study
- 1.7Significance of the Study
- 1.8Structure of the Research
- 1.9Definition of Terms
Chapter TWO
LITERATURE REVIEW
- 2.1Overview of Edge AI Architectures
- 2.2Deep Learning for Embedded Vision
- 2.3Hardware Accelerators: GPUs, TPUs, and ASICs
- 2.4Low-Power Design Techniques
- 2.5Memory Hierarchy and Bandwidth in Embedded Systems
- 2.6Real-Time Computer Vision Requirements
- 2.7Quantization and Model Compression
- 2.8On-Device Inference Pipelines
- 2.9Power-Aware Scheduling and Duty Cycling
- 2.10Related Works in Edge AI Accelerators
Chapter THREE
SYSTEM DESIGN AND IMPLEMENTATION
- 3.1Research Approach and Design Methodology
- 3.2System Architecture Overview
- 3.3Hardware Platform and Toolchains
- 3.4Data Acquisition and Dataset Curation
- 3.5Model Selection and Training Strategy
- 3.6Accelerator Architecture Details
- 3.7Power and Thermal Modeling
- 3.8Evaluation Metrics and Benchmark Suite
- 3.9Experimental Setup and Validation
- 3.10Ethical, Safety, and Compliance Considerations
Chapter FOUR
SYSTEM TESTING AND EVALUATION
- 4.1Baseline System Implementation
- 4.2Hardware-Software Co-Design Optimizations
- 4.3Quantization and Precision Tuning Results
- 4.4Memory Footprint and Bandwidth Analysis
- 4.5Real-Time Vision Performance Metrics
- 4.6Energy Efficiency and Thermal Performance
- 4.7Comparative Evaluation with State-of-the-Art Accelerators
- 4.8Case Studies: Embedded Vision Applications
Chapter FIVE
SUMMARY, CONCLUSION AND RECOMMENDATIONS
- 5.1Summary of Findings
- 5.2Theoretical and Practical Implications
- 5.3Limitations and Future Work
- 5.4Conclusions
- 5.5Recommendations for Deployment
- 5.6Potential for Further Research
Project Abstract
In the context of pervasive intelligent sensing, this research presents a low-power edge AI accelerator optimized for real-time computer vision tasks in embedded systems, addressing the growing demand for on-device inference with strict power and latency constraints. The proposed architecture integrates a heterogeneous compute fabric combining domain-specific accelerators, such as tensor cores and SAT-based feature extractors, with a unified memory hierarchy and near-threshold voltage operation to maximize energy efficiency without sacrificing accuracy. A key focus is on end-to-end efficiency from sensor data capture to decision output, incorporating bespoke dataflow scheduling, memory compression, and activation sparsity exploitation to reduce data movement energy, which is a dominant component in embedded inference. We first analyze representative computer vision workloads, including object detection, semantic segmentation, and optical flow, identifying their computational patterns and memory footprints. Based on this analysis, we design a modular accelerator platform featuring configurable convolution units, fast Fourier transform blocks for frequency-domain filtering, and a lightweight vision processing pipeline that leverages fixed-point arithmetic with dynamic precision scaling. The memory subsystem employs hierarchical caching, scratchpad memories, and data reuse strategies to minimize DRAM access, while power management techniques such as clock gating, voltage scaling, and power islands are implemented to adapt to varying workload intensities. A compiler and runtime layer is developed to automate kernel mapping, memory tiling, and data layout optimizations, enabling portable deployment across different embedded devices and sensor configurations. Experimental evaluation uses a heterogeneous set of benchmarks that reflect real-world edge scenarios, including low-resolution surveillance streams, autonomous navigation cues from monocular cameras, and agricultural monitoring with multi-spectral inputs. The accelerator demonstrates competitive frame rates under 10 W total system power, achieving millisecond-scale latency for multi-object tracking and robust real-time inference under dynamic lighting and occlusion conditions. Accuracy metrics show negligible degradation compared to full-precision baselines after quantization and mixed-precision optimization, with classification and segmentation tasks maintaining performance within 2–3 percentage points of reference models. Additionally, the research investigates thermal and reliability considerations for sustained operation in compact enclosures, presenting thermal-aware scheduling and error-resilient computation techniques that preserve performance under temperature fluctuations. A cost-benefit analysis compares the proposed solution with conventional GPU-based edge inference and cloud offloading, highlighting improvements in energy efficiency, data privacy, and latency, as well as reductions in communication bandwidth and cloud dependency. The study concludes with a comprehensive discussion of design trade-offs, scalability to higher-resolution inputs, and the potential for on-chip learning adaptations in constrained environments. It provides a blueprint for deploying energy-aware edge AI accelerators in a wide range of embedded platforms, enabling autonomous, intelligent perception directly at the source of data generation.
Project Overview
What This Project Is About
A practical exploration of a compact computing component that powers smart devices to understand what they see. The project investigates how to run powerful image and video analysis on small, energy-efficient hardware without relying on cloud servers.
The Problem It Addresses
Many devices like drones, wearables, and home sensors need fast vision processing while conserving battery life. Outsourcing to the cloud adds latency and raises privacy concerns. The project targets a local, low-energy solution that can still deliver real-time results.
Objectives of the Project
- Design a lightweight accelerator that speeds up vision tasks on embedded hardware.
- Reduce power consumption while maintaining accuracy in real-time inference.
- Demonstrate a practical end-to-end system for live video analysis on a small device.
- Provide a simple workflow for deploying common computer vision models on the accelerator.
What You Will Do Step by Step
1) Learn basic hardware concepts and the target device. 2) Select simple vision models suitable for edge deployment. 3) Implement or integrate a low-power accelerator design. 4) Build a test setup with video data and metrics. 5) Measure speed, accuracy, and power. 6) Optimize software and hardware parameters. 7) Compare with a baseline embedded setup. 8) Document results and provide deployment recommendations.
Expected Outcome
A working edge AI accelerator on an embedded platform with real-time vision capability, showing clear gains in speed and power efficiency over a non-accelerated approach. The project will include performance data, usage guidelines, and potential paths for further optimization.