Design and implementation of a low-power AM/FM wireless transceiver using software-defined radio (SDR) on an FPGA-based platform

Project Abstract

This project presents the design and implementation of a low-power AM/FM wireless transceiver using software-defined radio (SDR) on an FPGA-based platform, aimed at developing a compact, energy-efficient, and flexible communication system suitable for IoT and portable applications. The core objective is to demonstrate how modern FPGA architectures, combined with optimized SDR techniques, can deliver reliable analog RF processing, robust modulation/demodulation, and efficient DSP pipelines within tight power budgets. The transceiver architecture integrates an RF front-end with a flexible digital backend, enabling seamless switching between AM and FM modes while maintaining high sensitivity, dynamic range, and low phase noise under battery-powered operation. A key contribution is the co-design of analog front-end components, including low-noise amplifiers, mixers, and IF filtering, with a reconfigurable digital signal path implemented on a mid-range FPGA, leveraging high-speed transceivers and parallel processing to achieve real-time performance. The RF chain is designed to support a defined spectrum in the AM broadcast and FM bands, with tunable local oscillator synthesis and agile channelization to cope with adjacent-channel interference. The SDR-based digital core employs a modular architecture comprising waveform generation, demodulation, channel filtering, automatic gain control, and error correction blocks. To minimize power consumption, the design employs adaptive sampling rates, dynamic clock gating, and resource-sharing techniques across AM and FM processing blocks, as well as fixed-point arithmetic tailored to the dynamic range requirements of audio and RF signals. The project includes a detailed verification and validation strategy, combining behavioral simulations, FPGA-in-the-loop testing, and over-the-air experiments to quantify bit-error rate (BER), signal-to-noise ratio (SNR), adjacent channel leakage ratio (ACLR), and audio quality metrics under varying propagation conditions and battery states. A notable aspect is the implementation of a software-defined control plane that orchestrates mode selection, parameter tuning, and power management via a microcontroller interface. The transceiver supports firmware updates to extend modulation schemes and radio standards without hardware modification, ensuring longevity in evolving communication environments. Performance results indicate that the FPGA-based SDR transceiver achieves competitive sensitivity and selectivity with significantly reduced power consumption compared to traditional fixed hardware implementations, while maintaining alignment with regulatory transmitter limits. The system demonstrates scalable potential for multi-standard operation, including future support for narrowband and wideband signaling, and provides a practical platform for hands-on education and rapid prototyping in wireless communications research. Potential applications include remote sensing, portable radio receivers, and interoperable cellular/IoT gateways where low power, flexibility, and fast development cycles are critical. This work contributes to the body of knowledge on energy-aware SDR design, offering an optimized blueprint for integrating RF front-ends with reconfigurable digital processing on FPGA platforms.

Project Overview

What This Project Is About

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A straightforward, hands-on project exploring how a radio transceiver can be built using simple, off-the-shelf components and a flexible software layer. The aim is to design a system that can transmit and receive AM and FM signals with low power, using a software-defined radio (SDR) approach on an FPGA platform. The project balances practical hardware work with software control to show how changes in code affect radio behavior.

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The Problem It Addresses

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Traditionally, radio designs are fixed in hardware, which makes updates slow and expensive. This project looks at how a single flexible platform (SDR on an FPGA) can handle multiple modulation formats (AM and FM) and adapt to different frequencies and power levels without rebuilding the hardware. This flexibility lowers cost and speeds up experimentation for learners and engineers.

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Objectives of the Project

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1. Understand the basics of AM and FM radio concepts and how SDR changes the design approach.
2. Implement an FPGA-based hardware core that can support low-power operation.
3. Develop software control to configure transmission and reception parameters.
4. Demonstrate real-time AM and FM transmission with measurable performance metrics.
5. Assess power consumption and identify optimization opportunities.

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What You Will Do Step by Step

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1. Study SDR concepts and the role of FPGAs in radio systems.
2. Design a simple transmitter and receiver chain for AM and FM signals.
3. Implement the core on an FPGA and create firmware to control frequency, modulation, and power.
4. Set up an experimental testbench to generate and capture signals.
5. Measure key metrics such as signal quality, power usage, and range.
6. Iterate designs to improve efficiency and stability.
7. Document results and compare AM vs FM performance under low-power constraints.
8. Prepare a final demonstration and a report summarizing findings.

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Expected Outcome

A functioning low-power AM/FM SDR transceiver on an FPGA with documented performance metrics, design notes, and practical guidance for extending the system to other frequencies or modes. The project should provide a clear demonstration of how software and hardware interact in a flexible radio system.