Design and construction of an electronic dice display with audio unit

 

Table Of Contents


  • <p> </p><p>FIG
  • 1.0&nbsp; &nbsp;and gate diagram<br>Fig
  • 1.1&nbsp; &nbsp;capacitor diagram<br>Fig
  • 1.2&nbsp; &nbsp;seven segment diagram<br>Fig
  • 3.01&nbsp; &nbsp;block schematic diagram of an electronic dice display<br>Fig
  • 3.02&nbsp; &nbsp;block schematic diagram of an audio unit<br>Fig
  • 3.03&nbsp; &nbsp;555 timer schematic circuit diagram<br>Fig
  • 3.04&nbsp; &nbsp;555 timer block diagram<br>Fig
  • 3.05&nbsp; &nbsp;555 timer configuration<br>Fig
  • 3.06&nbsp; &nbsp;pin-out connection of a 555 timer<br>Fig 3.07a &nbsp; &nbsp;555 timers in astable mode<br>Fig 3.07b &nbsp; &nbsp;timing diagram<br>Fig
  • 3.08&nbsp; &nbsp;Jk flip flop symbol<br>Fig
  • 3.09&nbsp; &nbsp;delay flip-flop from Jk flip-flop<br>Fig 3.10a &nbsp; &nbsp;delay flip-flop from JK flip-flop<br>Fig 3.10b &nbsp; &nbsp;D flip-flop timing diagram<br>Fig
  • 3.11&nbsp; &nbsp;D type flip-flop in TTL<br>Fig
  • 3.12&nbsp; &nbsp;Quad-and gate symbol<br>Fig 3.13a &nbsp; &nbsp;Circuit block diagram of a digital counter<br>Fig 3.13b &nbsp; &nbsp;Output wave forms<br>Fig 3.14a &nbsp; &nbsp;circuit block diagram of mod 10 counter<br>Fig 3.14b &nbsp; &nbsp;output wave forms<br>Fig
  • 3.15&nbsp; &nbsp;Mod 6 counter using decade counter<br>Fig
  • 3.16&nbsp; &nbsp;functional logic diagram of BCD to decimal decoder<br>Fig
  • 3.17&nbsp; &nbsp;seven segment display layout arrangement<br>Fig
  • 3.18&nbsp; &nbsp;seven segment display connections<br>Fig
  • 3.19&nbsp; &nbsp;BCD to seven segment block diagram<br>Fig
  • 3.20&nbsp; &nbsp;7447 BCD to seven segment decoder driver functional<br>Fig
  • 4.01&nbsp; &nbsp;top view of 7414<br>Fig
  • 4.02&nbsp; &nbsp;counter configuration for the 7490A<br>Fig
  • 4.03&nbsp; &nbsp;top view of 7474<br>Fig
  • 4.04&nbsp; &nbsp;top view of SN 7447<br>Fig
  • 4.05&nbsp; &nbsp;top view of common unode display<br>Fig
  • 5.01&nbsp; &nbsp;output wave of 555 timers Table
  • 3.1time table for sK flip-flop<br>Table
  • 3.2delay flip-flop forms flip-flop<br>Table
  • 3.4and logic gate truth table<br>Table
  • 3.5table of counter output in various forms.<br>Table
  • 3.7bid to seven segment decoder truth table<br>Table 4.1a BCD count sequence<br>Table
  • 5.0procedure chart<br>Table
  • 5.1system flowchart<br>Table
  • 6.0program design<br>Table
  • 6.1program flowchart<br>&nbsp;<br>Title page &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;ii<br>Approval page &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; iii<br>Dedication &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; iv<br>Acknowledgement &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; v<br>Abstract &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; vi<br>Organization of work &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; viii<br>List of figures &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; x<br>List of table &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; xii<br>Table of content &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; xiii</p><p><b>

Chapter ONE

INTRODUCTION

  • <br>INTRODUCTION &nbsp; &nbsp; &nbsp; </b>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 1<br>
  • 1.0&nbsp; &nbsp;Statement of problem &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;1<br>
  • 1.1&nbsp; &nbsp;purpose of study &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 2<br>
  • 1.2&nbsp; &nbsp;Aims and objectives &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 2<br>
  • 1.3&nbsp; &nbsp;Scope &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 3<br>
  • 1.4&nbsp; &nbsp;Limitations &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 3<br>
  • 1.5&nbsp; &nbsp;Definitions of terms &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 5</p><p><b>

Chapter TWO

LITERATURE REVIEW

  • </b><br>Literature Review &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 9</p><p><b>

Chapter THREE

SYSTEM DESIGN AND IMPLEMENTATION

  • </b><br>Description and Analysis of the Existing System &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;15<br>Organization structure &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 16<br>Objectives of the existing system &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 17</p><p><b>

Chapter FOUR

SYSTEM TESTING AND EVALUATION

  • </b><br>Design of the New System &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;18<br>Output specification and design &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 20<br>Input specification and design &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 29<br>File design &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 38<br>Procedure chart &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 39<br>System flow chart &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 41<br>System requirement &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 42</p><p><b>

Chapter FIVE

SUMMARY, CONCLUSION AND RECOMMENDATIONS

  • &nbsp; &nbsp;</b><br>Implementation &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 47<br>Program flowchart &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 49</p><p><b>CHAPTER SIX</b><br>Documentation &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 51</p><p><b>CHAPTER SEVEN<br>Recommendation and Conclusion &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 53 &nbsp; &nbsp; &nbsp; &nbsp;</b><br>
  • 7.1&nbsp; &nbsp;Recommendation &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 53<br>
  • 7.2&nbsp; &nbsp;Conclusion &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 53<br><b>Reference &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 55</b></p> <br><p></p>

Project Abstract

<p> This work deals extensively with the design and construction of an electronic dice display (EOD) with audio unit. The device displays the of a ludo dice in numerical form and also produces sound as it displays the number.<br>The device works with principle of chance employee by ludo game players. The output of the display is usually very rapid that the player does actually sex the number when the device is switched on so that it will purely be a game of chance. When the off key is pressed, a patellar number is displayed and this number is the number, the player got.<br>The operation of the device starts by the generation of a pulse frequency. The pulse frequency (square wave signal) generated by times (555 times) by connecting in an instable multibibrator. The output from this timer is used in clocking the binary counter (mod to counter) but this counter is biased to count just from zero through six (0-6) as we have in a lodo game dice. To achieve this bias in the mod 10 counter, the output from Qo, Q1 and Q2 were connected to the reset pins so that once the counter finishes the count of six or goes back to zero.<br>The result from the binary counter is then fed to the decoder driver before connecting it to seven segment so that the decoder will be able to covert the binary values to the decimal values that are being used in the ludo game dice. The seven segment then displays the numbers by lighting the diodes that make up that particular value.<br>This device is being regulated by a latch (4-edge triggered flip-flop) which has two switches, one is used for putting the power supply and the other two push switches for the working of the dice display. <br></p>

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